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TMP93CS44 데이터시트(PDF) 173 Page - Toshiba Semiconductor |
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TMP93CS44 데이터시트(HTML) 173 Page - Toshiba Semiconductor |
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173 / 224 page ![]() TMP93CS44/S45 2004-02-10 93CS44-171 Figure 3.10.24 Transmitted Data Hold Time at End of Transmit 2. 8-bit receive mode Set the control register to a receive mode and SBICR1<SIOS> to 1 for switching to the receive mode. Data is received from the SI pin to the shift register in synchronous with the serial clock, starting from the least significant bit (LSB). When the 8-bit data is received, the data is transferred from the shift register to the SBIDBR. The INTS2 (Buffer full) interrupt request is generated to request to read the received data. The data is then read from the SBIDBR by the interrupt service program. When the internal clock is used, the serial clock will stop and automatic-wait function will be initiated until the received data is read from the SBIDBR. When the external clock is used, since shift operation is synchronized with the clock pulse provided externally, the received data should be read from the SBIDBR before next serial clock input. If the received data is not read, further data to be received is canceled. The maximum transfer speed when the external clock is used is determined by the delay time between the time when an interrupt request is generated and the time when received data is read. Receiving data is ended by clearing <SIOS> to 0 with the buffer full interrupt service program or setting SBICR1<SIOINH> to 1. When <SIOS> is cleared, received data is transferred to the SBIDBR in complete blocks. The received mode ends when the transfer is complete. In order to confirm if data is surely received by the program, set SBISR<SIOF> to be sensed. <SIOF> is cleared to 0 when receiving is complete. After confirming that receiving has ended, the last data is read. When <SIOINH> is set to 1, receiving data stops. <SIOF> turns 0 (the received data becomes invalid, therefore no need to read it). Note: When the transfer mode is switched, the SBIDBR contents are lost. In case that the mode needs to be switched, receiving data is concluded by clearing <SIOS> to 0, read the last data, and then switch the mode. SCK pin Bit7 Bit6 <SIOF> SO pin tSODH = Min 3.5/fFPH [s] (in NORMAL mode) |
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