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AX88796BLF 데이터시트(PDF) 50 Page - ASIX Electronics Corporation

부품명 AX88796BLF
상세설명  Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller
PDF  82 Pages
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제조업체  ASIX [ASIX Electronics Corporation]
홈페이지  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX88796BLF 데이터시트(HTML) 50 Page - ASIX Electronics Corporation

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ASIX ELECTRONICS CORPORATION
50
AX88796BLF / AX88796BLI
5.1.66 Inter-frame gap (IFG)
Offset 16H (Read/Write)
Field
Name
Description (Default = 15h)
7
-
Reserved, Always zero.
Inter-frame Gap for Back-To-Back Transmission without collision
IFG
Bit-time of Frame gap
15h – n
96 – (4*n)
15h (default)
96
6:0
IFG
15h + n
96 + (4*n)
5.1.67 Back-pressure Jam Limit Count (BJLC)
Offset 17H (Write)
Field
Name
Description
7:6
-
Reserved, Always zero.
5:0
BJLC
Back-pressure Jam Limit count, Default value is 19H.
5.1.68 Device Status Register (DSR)
Offset 17H (Read)
Field
Name
Description
7
B_ENDIAN
When set indicates big-endian mode. (The Big-endian Register’s value not all zero)
6
RDMA_RDY Remote DMA completed. It is same as ISR bit 6.
When set, it indicates the remote DMA process was completed.
5
RD_RDY
Read Data Port Ready, When set, indicates data was ready from SRAM to data port for
host reading.
4
D_RDY
Device Ready. When set, this bit indicates that AX88796B is ready to be accessed. This
register can be read when AX88796B in any power management mode.
When cleared, indicate AX88796B in reset, power saving or load EEPROM state.
3
-
Always zero
2
I_SPEED
PHY Link Speed:
0: indicate the link speed is 10Mb/s
1: indicate the link speed is 100Mb/s
1
I_DUPLEX
PHY Duplex mode:
0: half-duplex
1: full-duplex
0
I_LINK
Link Status:
0: Link off
1: Link up
5.1.69 MAX Frame Size Register (MFSR0)
Offset 18H (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MFSR0
MAX Frame size [7:0], default {MFSR1, MFSR0} = 1536 bytes
5.1.70 MAX Frame Size Register (MFSR1)
Offset 19H (Read/Write)
Field
Name
Description (Default = 06h)
7:3
-
Reserved
2:0
MFSR1
MAX Frame size [10:8]



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