LM98640CVAL datasheet(42/55 Pages) TI2

부품명	LM98640CVAL

상세설명	LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output

PDF	55 Pages

Scroll/Zoom	100%

제조업체	TI2 [Texas Instruments]

홈페이지	https://www.ti.com

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42 / 55 page

LM98640QML-SP

SNAS461G – MAY 2010 – REVISED NOVEMBER 2018

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Product Folder Links: LM98640QML-SP

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Table 7. Register Definitions - GAIN & Offset DAC Configuration

ADDRESS

(BINARY)

TITLE

BASELINE

(BINARY)

BIT(s)

DESCRIPTION

01 0000

CDAC1

0000 0000

[7:0]

Channel 1 Coarse DAC Register.

[7:1]

Not Used.

[0]

Bit 8 of Channel 1 Coarse DAC Offset Value.

01 0001

CDAC1

1111 1111

[7:0]

Channel 1 Coarse DAC Offset Value bits 7:0.

01 0010

FDAC1

0000 0000

[7:0]

Channel 1 Fine DAC Register.

[7:1]

Not Used.

[0]

Bit 8 of Channel 1 Fine DAC Offset Value.

01 0011

FDAC1

1111 1111

[7:0]

Channel 1 Fine DAC Offset Value bits 7:0.

01 0101

PGA1

0110 0001

[7:0]

Channel 1 Programmable Gain Amplifier Value.

01 1000

CDAC2

0000 0000

[7:0]

Channel 2 Coarse DAC Register.

[7:1]

Not Used.

[0]

Bit 8 of Channel 2 Coarse DAC Offset Value.

01 1001

CDAC2

1111 1111

[7:0]

Channel 2 Coarse DAC Offset Value bits 7:0.

01 1010

FDAC2

0000 0000

[7:0]

Channel 2 Fine DAC Register.

[7:1]

Not Used.

[0]

Bit 8 of Channel 2 Fine DAC Offset Value.

01 1011

FDAC2

1111 1111

[7:0]

Channel 2 Fine DAC Offset Value bits 7:0.

01 1100

PGA2

0110 0001

[7:0]

Channel 2 Programmable Gain Amplifier Value.

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