ST10F271Z1T3 datasheet(24/185 Pages) STMICROELECTRONICS

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Internal Flash memory

ST10F271Z1

24/185

Internal Flash memory

5.1

Overview

The on-chip Flash is composed by one matrix module, 128 Kbytes wide.

This module is on ST10 Internal bus, so it is called IFlash

Figure 5.

Flash structure

The programming operations of the Flash are managed by an embedded Flash

Program/Erase Controller (FPEC). The High Voltages needed for Program/Erase operations

are internally generated.

The Data bus is 32-bit wide for fetch accesses to IFlash, while it is 16 bit wide for read

accesses to IFlash. Read/write accesses to IFlash Control Registers area are 16 bit wide.

5.2

Functional description

5.2.1

Structure

The following table shows the Address space reserved to the Flash module.

Note:

The ST10F271Z1 being based on the same silicon as the ST10F272, 256 Kbyte of Flash

are implemented on the device. The range 03’0000h - 04’FFFFh is not physically disabled

even if not available for use. Therefore this address range MUST be reserved by the

Flash Control

Bank 0: 128 Kbyte

Program Memory

HV and Ref.

Generator

Program/Erase

Controller

I-BUS Interface

8 Kbyte Test-Flash

IFlash

Control Section

Registers

Table 3.

Address space reserved to the Flash module

Description

Addresses

Size

IFlash sectors

0x00 0000 to 0x02 FFFF

128 Kbytes

IFlash reserved sector

0x03 0000 to 0x04 FFFF

128 Kbytes

Reserved IBUS area

0x05 0000 to 0x07 FFFF

192 Kbytes

Registers and Flash internal reserved area

0x08 0000 to 0x08 FFFF

64 Kbytes

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