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ADC3441 데이터시트(PDF) 49 Page - Texas Instruments |
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ADC3441 데이터시트(HTML) 49 Page - Texas Instruments |
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49 / 88 page ![]() CLKP CLKM 0.1 F m CMOS Clock Input Device 0.1 F m CEQ CEQ CEQ CBOND 1 pF CBOND 1 pF Clock Buffer RESR 100 Ÿ LPKG 2 nH LPKG 2 nH RESR 100 Ÿ 20 Ÿ 20 Ÿ CLKP CLKM 5 k Ÿ 5 k Ÿ 0.95 V 49 ADC3441, ADC3442, ADC3443, ADC3444 www.ti.com SBAS670B – JULY 2014 – REVISED APRIL 2017 Product Folder Links: ADC3441 ADC3442 ADC3443 ADC3444 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated NOTE: CEQ is 1 pF to 3 pF and is the equivalent input capacitance of the clock buffer. Figure 148. Internal Clock Buffer A single-ended CMOS clock may be ac-coupled to the CLKP input, with CLKM connected to ground with a 0.1-μF capacitor, as shown in Figure 149. However, for best performance the clock inputs must be driven differentially, thereby reducing susceptibility to common-mode noise. For high input frequency sampling, TI recommends using a clock source with low jitter. Band-pass filtering of the clock source may help reduce the effects of jitter. There is no change in performance with a non-50% duty cycle clock input. Figure 149. Single-Ended Clock Driving Circuit |
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