SPSB081 datasheet(70/137 Pages) STMICROELECTRONICS

70 / 137 page

Symbol

Parameter

Condition

Min Typ Max Unit Item

Internal Resistance

matching

RCANH,CANL

Biasing active; VTXDC = VTXDCHIGH;

No load

mR = 2 x (RCAN_H - RCAN_L)/(RCAN_H + RCAN_L)

10 kΩ resistor between CANH - CANL pin with external 5 V

-0.03

0.03

E.046

1. Voltage range is taken from ISO CD 16845-2 (high-speed medium access unit - in conformance to test plan).

Note:

CAN normal and low power mode, biasing active: Tested in TRX normal and CAN TRX STDBY (bias on) state

while the device is in active and V1_standby mode.

Table 48. CAN transceiver delay

Symbol

Parameter

Condition

Min Typ

Max Unit Item

tLOOP,hl

Loop delay TXDC to

RXDC (high to low)

5.5 V < VSREG < 18 V;

RL= 60 Ω ±1%

CL = 100 pF

30% VTXDC - 30% VRXDC;

TXDC fall time = 10 ns (90% - 10%)

CRXDC = 15 pF

255

E.047

tLOOP,lh

Loop delay TXDC to

RXDC (low to high)

5.5 V < VSREG < 18 V

RL = 60 Ω ±1%

CL = 100 pF

70% VTXD - 70% VRXD

TXDC rise time = 10 ns (10% - 90%)

CRXDC = 15 pF

255

E.048

tLOOP150,hl

Loop delay TXDC to

RXDC (high to low)

with 150Ω bus load

5.5 V < VSREG < 18 V

RL = 150 Ω

CL = 100 pF

30% VTXDC - 30% VRXDC

TXDC fall time = 10 ns (90% - 10%)

CRXDC = 15 pF

350

E.049

tLOOP150,lh

Loop delay TXDC to

RXDC (low to high)

with 150Ω bus load

5.5 V < VSREG < 18 V

RL = 150 Ω

CL = 100 pF;

70% VTXD - 70% VRXD

TXDC rise time = 10 ns (10% - 90%)

CRXDC = 15 pF

350

E.050

TBit(RXD) ≤

1Mb/s (1)

Recessive bit

symmetry at RXDC

5.5 V < VSREG < 18 V

RL = 60 Ω ±1%

70% VRXDC (rising) - 30% VTXDC (falling)

CL = 100 pF

CRXD = 15pF

TXD rise and fall time = 10 ns (10% - 90%, 90% -

10%)

900 1000 1050

E.051

SPSB081

CAN FD transceiver

DS14048 - Rev 3

page 70/137

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