SPSB081 datasheet(28/137 Pages) STMICROELECTRONICS

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or with thermal sensor “Th_CL4” in mode “cluster”

•

VSREG overvoltage/undervoltage

•

V1 undervoltage

The LIN receiver is not disabled in case of any failure condition (it is reactivated in case of FS by thermal

shutdown).

3.11.2

Error handling

The device LIN transceiver provides the following three error handling features.

3.11.2.1

Dominant TXD_L time out

If TXD_L is in dominant state (low) for t > tDOM(TXDL) the transmitter is disabled, the related status bit

LIN_TXD_DOM (SR2) is set.

The transmitter remains disabled until the status bit is cleared.

The TXD dominant timeout detection can be disabled via SPI (LIN_TXD_TOUT_EN = 0).

3.11.2.2

Permanent recessive

If TXD_L changes to dominant (low) state but RXD_L signal does not follow within t < tLIN the transmitter is

disabled, the status bit LIN_PERM_REC (SR2) is set.

The transmitter remains disabled until the status bit is cleared.

3.11.2.3

Permanent dominant

If the bus state is dominant (low) for t > tDOM(BUS) a bus permanent dominant failure is detected. The status bit

LIN_PERM_DOM (SR2) is set.

The transmitter is not disabled.

3.11.3

Wake-up from standby modes

In low power modes (V1_standby mode and VBAT_standby mode) the SPSB081 can receive two types of

wake-up signals from the LIN bus (configurable by SPI bit LIN_WU_config):

•

Recessive-Dominant-Recessive pattern with t > tDOM_LIN (default, according to LIN ISO 17987-4/2016)

A dominant time of at least 150 μs must be identified as a wake-up. Shorter dominant times may wake up the

device.

•

State change recessive-to-dominant or dominant-to-recessive (according to LIN ISO 17987-4/2016)

Note:

Dominant levels having duration less than a glitch filter time (it is defined 28 µs minimum, according to OEM

requirements version 1.3) have to be filtered and therefore they cannot wake up the device.

SPSB081

LIN bus interfaces (only for SPSB0815 and SPSB0813)

DS14048 - Rev 3

page 28/137

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