SPSB081 datasheet(95/137 Pages) STMICROELECTRONICS

95 / 137 page

Bit

Name

Description

1 = CAN Trx active mode

At exit from active mode, this bit is set to ‘0’ automatically

LIN_WU_EN(2)

Enable wake-up by LIN

0 = Disabled

1 = Enabled (default)

Note:

The wake-up behavior is configurable in the configuration register (0x3F)

CAN_WU_EN(2)

Enable wake-up by CAN

0 = Disabled

1 = Enabled (default)

Note:

Wake-up occurs at a wake-up event according to ISO 11898-2.

TIMER_NINT _SEL

Select timer for wake-up from standby modes

0 = Timer2 (default)

1 = Timer1

TIMER_WU _EN

Enable timer wake-up from standby modes

0 = Timer wake-up disabled (default)

1 = Timer wake-up enabled

V1stby mode: device wakes-up after timer expiration and generates NINT pulse

Vbatstby mode: device wakes-up after timer expiration and generates Nreset

TRIG

Watchdog trigger bit

1. Lower is the timer duration and major is the contribution of output tdON.

2. For SPSB0815 and SPSB0813 either LIN, CAN or WUx must be enabled as wake-up source. For

SPSB081C devices (without LIN), the LIN_WU_EN is forced to 0. If DIR_WU2_EN is set to 0, setting

all bits 3, 4, 16 and 17 to ‘0’ is an invalid setting. If DIR_WU2_EN is set to 1, setting all bits 3, 4, 16 to ‘0’

is an invalid setting. In case of invalid setting, all wake-up sources will be configured according to default

setting and SPI error bit (SPIE) in global status register will be set.

Table 73. Control register CR2 (0x02)

Bit

name

Access

0 (R)

0 (R/W)

0 (R)

0 (R/W)

1 (R/

0 (R/W)

Table 74. CR2 signals description

Bit

Name

Description

RES

Reserved

RES

Reserved

T2 ON_2

Configuration of Timer2 on-time(1)

000 = ton1 (default)

001 = ton2

010 = ton3

011 = ton4

T2 ON_1

T2 ON_0

SPSB081

Control registers

DS14048 - Rev 3

page 95/137

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