SPC563M60X datasheet(78/128 Pages) STMICROELECTRONICS

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Electrical characteristics

SPC563M64x, SPC563M60x

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DocID14642 Rev 12

4.6.1

Regulator example

Figure 4. Core voltage regulator controller external components preferred

configuration

There are three options for the bypassing and compensation networks for the 1.2V regulator

controller. The component values in the following table are the same for all PMC network

requirements.

—

Variation of POR for rising

5 V VDDREG supply

Por5V_r –

35%

Por5V_r

Por5V_r +

50%

Por5V_f

Nominal POR for falling 5 V

VDDREG supply

—2.47

—

Variation of POR for falling

5 V VDDREG supply

Por5V_f –

35%

Por5V_f

Por5V_f +

50%

Using external ballast transistor.

Min range is extended to 10% since Lvi1p2 is reprogrammed from 1.2 V to 1.16 V after power-on reset.

LVI for falling supply is calculated as LVI rising - LVI hysteresis.

The internal voltage regulator can be disabled by tying the VDDREG pin to ground. When the internal voltage regulator is

disabled, the LVI specifications are not applicable because all LVI monitors are disabled. POR specifications remain valid

when the internal voltage regulator is disabled as long as VDDEH and VDD33 supplies are within the required ranges.

This parameter is the “inrush” current of the internal 3.3V regulator when it is turned on. This spec. is the current at which

the regulator will go into current limit mode.

Lvi3p3 tracks DC target variation of internal Vdd33 regulator. Minimum and maximum Lvi3p3 correspond to minimum and

maximum Vdd33 DC target respectively.

Table 15. PMC electrical characteristics (continued)

Name

Parameter

Min

Typ

Max

Unit

Notes

Keep inductance

below 20 nH

MCU

VDDREG

VRCCTL

VDD

VSS

Keep inductance from 5V supply

power supply

to the transistor collector and

VDDREG below 1

H if not using R

5V from

CREG Required only

if RC is used

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