STA680 datasheet(35/48 Pages) STMICROELECTRONICS

35 / 48 page

DS5877 Rev 13

35/48

STA680

Digital I/O and memory interfaces

5.6

I2C interfaces

The STA680 features two I2C interfaces. For the relevant pin description see Table 13.

The data pin of the I2C interface is an open drain driver and it needs a resistive pull- up as

required by Philips® I2C specification.

Figure 12 shows timing diagrams and waveform for the two I2C interface.

Figure 12. Timing diagrams and waveform for the two I2C interfaces

In Table 14 the timing values for the I2C interfaces are reported.

Table 13. Host and auxiliary I2C interface pin list

Pin name

Designation

Type

Drive

IIC1_SCL

Host Micro I2C interface serial clock line

I/O

4mA

IIC1_SDA

Host Micro I2C interface serial data line

I/O

4mA

IIC1_DA

Host Micro I2C interface data acknowledged

I/O

4mA

IIC2_SCL

Auxiliary I2C interface serial clock line

I/O

4mA

IIC2_SDA

Auxiliary I2C interface serial data line

I/O

4mA

IIC2_DA

Auxiliary I2C interface data acknowledged

I/O

4mA

Table 14. I2C interface timing values

Symbol

Parameter

Standard-mode

Fast-mode

Unit

Min.

Max.

Min.

Max.

Fscl

SCL clock frequency

100

400

kHz

Tlow

Low period of SCL clock

4.7

1.3

μs

Thigh

High period of SCL clock

0.6

μs

Th, dat

Data hold time

μs

Ts, dat

Data setup time

250

100

μs

Th, sta

Hold time for start condition

0.6

μs

Ts, sto

Setup time for stop

condition

0.6

μs

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