STM32H533CE datasheet(125/231 Pages) STMICROELECTRONICS

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DS14539 Rev 1

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STM32H533xx

Electrical characteristics

200

5.3.9

PLL characteristics

The parameters given in Table 47 are derived from tests performed under temperature and

VDD supply voltage conditions summarized in Table 20.

Table 47. PLL characteristics (wide VCO frequency range)(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPLL_IN

PLL input clock

MHz

PLL input clock duty cycle

fPLL_P_OUT

PLL multiplier output clock

P, Q, R

VOS0

250(2)

MHz

VOS1

200(2)

VOS2

150(2)

VOS3

100(2)

fVCO_OUT PLL VCO output

128

560(2)

tLOCK

PLL lock time

Normal mode

100(3)

μs

Sigma-delta mode (fPLL_IN ≥ 8 MHz)

120(3)

Jitter

Cycle-to-cycle jitter

fVCO_OUT = 128 MHz

±ps

fVCO_OUT = 200 MHz

fVCO_OUT = 400 MHz

fVCO_OUT = 560 MHz

Long term jitter

Normal mode (f PLL_IN = 2 MHz),

fVCO_OUT = 560 MHz

-±0.2

Normal mode (f PLL_IN = 16 MHz),

fVCO_OUT = 560 MHz

-±0.8

Sigma-delta mode (f PLL_IN = 2 MHz),

fVCO_OUT = 560 MHz

-±0.2

Sigma-delta mode (f PLL_IN = 16 MHz),

fVCO_OUT = 560 MHz

-±0.8

IDD(PLL)

PLL power consumption on

VDD

fVCO_OUT = 560 MHz

VDD

-330

420

μA

VCORE

-630

fVCO_OUT = 128 MHz

VDD

-155

230

VCORE

-170

1. Specified by design - Not tested in production, unless otherwise specified.

2. This value must be limited to the maximum frequency due to the product limitation.

3. Evaluated by characterization - Not tested in production.

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