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TMS320DM647_0804 데이터시트(PDF) 51 Page - Texas Instruments |
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TMS320DM647_0804 데이터시트(HTML) 51 Page - Texas Instruments |
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51 / 182 page ![]() 4.3 Configuration Switch Fabric TMS320DM647/TMS320DM648 Digital Media Processor www.ti.com SPRS372B – MAY 2007 – REVISED APRIL 2008 Table 4-1. Connectivity Matrix for Data SCR MEGAMODULE DDR2 EMIF EMIFA VIDEO VIDEO PCI VLYNQ Configuration PORT 0-2 PORT 3-4 SCR TC0 Y Y Y Y Y Y Y Y TC1 Y Y Y Y Y Y Y Y TC2 Y Y Y Y Y Y Y Y TC3 Y Y Y Y Y N N N Megamodule N Y Y N N Y Y N HPI Y Y Y N N Y Y Y PCI Y Y Y N N Y Y Y VLYNQ Y Y Y N N Y Y Y Ethernet Subsystem Y Y Y N N N N N Figure 4-2 shows the connection between the C64x+ megamodule and the configuration SCR, which is mainly used by the C64x+ Megamodule to access peripheral registers. The data SCR also has a connection to the configuration SCR that allows masters to access most peripheral registers. The only registers not accessible by the data SCR through the configuration SCR are the device configuration registers and the PLL1 and PLL2 controller registers; these can be accessed only by the C64x+ Megamodule. The configuration SCR uses 32-bit configuration buses running at SYSCLK1 frequency. SYSCLK1 is supplied by the PLL1 controller and is fixed at a frequency equal to the CPU frequency divided by 3. Submit Documentation Feedback System Interconnect 51 |
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