S2-LPS datasheet(16/73 Pages) STMICROELECTRONICS

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3.9.1

Harmonic emission at 433 MHz

Table 24. Harmonic emission at 433 MHz

Parameter

Test conditions

SMPS on

Unit

dBm

-51

-56

-39

-34

-46

-44

3.9.2

Harmonic emission at 840-868 MHz

Table 25. Harmonic emission at 840-868 MHz

Parameter

Test conditions

HPM/LPM/SMPS on

Unit

dBm

-38

-54

-52

-43

-51

3.10

Digital interface specification

Table 26. Digital SPI input, output and GPIO specification

Parameter

Test conditions

Min.

Typ.

Max.

Unit

SPI clock frequency

MHz

Port I/O capacitance

1.4

Rise time

From 0.1*VDD to 0.9*VDD, CL=20 pF (low

output current programming)

6.0

From 0.1*VDD to 0.9*VDD, CL=20 pF (high

output current programming)

2.5

Fall time

From 0.1*VDD to 0.9*VDD, CL=20 pF (low

output current programming)

7.0

From 0.1*VDD to 0.9*VDD, CL=20 pF (high

output current programming)

2.5

Logic high level input voltage

VDD/2

+0.3

Logic low level input voltage

VDD/8

+0.3

High level output voltage

IOH = -2.4 mA (-4.2 mA into high output current

mode).

(5/8)*

S2-LPS

Digital interface specification

DS13831 - Rev 1

page 16/73

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