S2-LPS datasheet(42/73 Pages) STMICROELECTRONICS

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MCU interface

Communication with the MCU goes through a standard 4-wire SPI interface and 4 GPIOs (plus SHUTDOWN pin).

MCU can performs the following operations:

•

Program the S2-LPS in different operating modes by sending commands

•

Read data from the RX FIFO and write data into the TX FIFO

•

Configure the S2-LPS through the registers

•

Retrieve information from the S2-LPS

•

Get interrupt requests and signals from the GPIO pins

•

Apply external signals to the GPIO pins

•

Put the S2-LPS in SHUTDOWN state or exit from SHUTDOWN state

7.1

Serial peripheral interface

The four-wire SPI interface consist of:

•

SCLK: the SPI clock from MCU to the S2-LPS

•

MOSI: data from MCU to the S2-LPS

•

MISO: data from the S2-LPS to MCU

•

CSn: chip select signal, active low.

As the MCU is the master, it always drives the CSn and SCLK. According to the active SCLK polarity and phase,

the S2-LPS SPI can be classified as mode 0 (CPOL=0, CPHA=0), which means that the base value of SCLK

is zero, data are read on the clock rising edge and data are changed on the clock falling edge. The MISO is in

tri-state mode when CSn is high. All transfers are MSB first.

The interface allows the following operations:

•

Write data (to registers or TX FIFO)

•

Read data (from registers or RX FIFO)

•

Send commands.

The SPI communication is supported in all the active states, and also during the low power state: STANDBY and

SLEEP.

When accessing the SPI interface, the two status bytes of the MC_STATE (MC_STATE[1], MC_STATE[0])

registers are sent to the MISO pin.

Figure 13. SPI write sequence

S2-LPS

MCU interface

DS13831 - Rev 1

page 42/73

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