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S2-LPS 데이터시트(PDF) 32 Page - STMicroelectronics

부품명 S2-LPS
상세설명  Ultra-low power, high performance, sub-1 GHz transceiver
PDF  73 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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S2-LPS 데이터시트(HTML) 32 Page - STMicroelectronics

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The set of eight levels is used to shape the ASK signal. In this case, the modulator works as a counter that counts
when transmitting a one and down when transmitting a zero. The counter counts at a rate equal to 8 times the
symbol rate (in this case, the step width is fixed by symbol rate).
For OOK modulation, the signal is abruptly switched between two levels only: no power and maximum. This mode
is obtained setting the PA_RAMP_EN=0.
With the digital power-ramping, the digital PA interpolation can be enabled through the PA_INTERP_EN field of
the MOD1 register.
When this feature is enabled, the power values specified in the PA_POWER registers are linearly interpolated by
the modulator before being applied to the PA.
The mathematical interpolation factor applied at each output sample is 64 for data rates corresponding to
DATA_RATE_E < 5, it is then automatically scaled as
64
2DATA_RATE_E−5anditisautomaticallydisabledfor
DATA_RATE_E = 11.
Figure 10. Output power ramping configuration
4.4.6.2
Transmitter data modes
Direct modes are primarily intended to completely bypass the automatic packet handler, in order to give the user
maximum flexibility in the choice of frame formats. In specific:
Direct through FIFO mode: the packet is written in TX FIFO. The user build the packet according to his
need including preamble, payload and soon on. The data are transmitted without any processing.
Direct through GPIO mode: the packet bits are continuously read from one of the GPIO pins, properly
configured, and transmitted without any processing. To allow the synchronization of an external data source,
a data clock signal is also provided on one of the GPIO pins. Data are sampled by the device on the rising
edge of such clock signal; it is the responsibility of the external data source to provide a stable input at this
edge.
PN9 mode: a pseudo-random binary sequence is generated internally. This mode is provided for test
purposes only.
S2-LPS
Digital modulator
DS13831 - Rev 1
page 32/73



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