S2-LPS datasheet(21/73 Pages) STMICROELECTRONICS

21 / 73 page

The integrated phase locked loop (PLL) is capable to synthesize a band of frequencies from 413 to 479 MHz, 826

to 958 MHz, providing the LO signal for the RX chain and the input signal for the PA in the TX chain.

Depending on the RF frequency and channel used, a very high accurate crystal or TCXO can be required.

The RF synthesizer implements fractional sigma delta architecture to allow fast settling and narrow channel

spacing. It is fully integrated, and it uses a multi-band VCO to cover the whole frequency range. All internal

calibrations are automatic.

According to the frequency synthesized the user must set the charge pump current according to the LO

frequency variations, in order to have a constant loop bandwidth. The charge pump current is controlled by

the PLL_CP_ISEL field (SYNT3 register) and the PLL_PFD_SPLIT_EN (SYNTH_CONFIG2). These fields should

be set in the following way:

Table 30. Charge pump words

VCO Freq (MHz)

fxo (MHz)

PLL_CP_ISEL

PLL_PFD_SPLIT_EN

ICP (μA)

3760

001

200

3460

010

240

The S2-LPS provides an automatic and very fast calibration procedure for the frequency synthesizer. If not

disabled, it performs the calibration each time the synthesizer is required to lock to the programmed RF channel

frequency (transaction from READY to LOCK/TX/RX or from RX to TX and vice versa). After completion, the

S2-LPS uses the calibration word and is stored in registers.

In order to get the synthesizer locked with the calibration procedure disabled, the correct calibration words must

be previously stored in registers by user for TX and RX respectively. The advantage is reduce the LOCK setting

time.

The transition time enables the S2-LPS for frequency hopping operation due to its reduced response time and

very quick programming synthesizer.

4.3.1

RF channel frequency settings

The channel center frequency can be programmed as follows:

Center frequency setting

fc=fbase+ fxo215∙CHSPACE ∙CHNUM

(5)

The fbase sets the main channel frequency; the value depends on the value of fxo (the frequency of the XTAL

oscillator, typically 26 MHz.

Base frequency setting

fbase= fxoB2∙D∙SYNT220

(6)

where:

SYNT is a programmable 28-bits integer (SYNT[3:0] registers).

B is the out-of-loop SYNTH divider (BS field of the SYNT3 register):

PLL divider

(7)

B= 4 for tℎe ℎigℎ band 826 MHz to 1055 MHz, BS=0

8 for tℎe middle band 413 MHz to 527 MHz, BS=1

D is the reference divider (REFDIV bit of XO_RCO_CONFIG0 register)

Reference divider

D= 1 if REFDIV=0 internal reference divider is disabled

2 if REFDIV=1 internal

reference divider is enabled

(8)

The resolution in the programmed value of the base frequency depends on the actual band selected.

S2-LPS

RF synthesizer

DS13831 - Rev 1

page 21/73

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