RIVA128 datasheet(49/77 Pages) STMICROELECTRONICS

49 / 77 page

128-BIT 3D MULTIMEDIA ACCELERATOR

RIVA 128

49/77

POWER-ON RESET CONFIGURATION

The RIVA 128 latches its configuration on the trail-

ing edge of RST# and holds its system bus inter-

face in a high impedance state until this time. To

accomplish this, pull-up or pull-down resistors are

connected to the FBA[9:0] pins as appropriate.

Since there are no internal pull-up or pull-down re-

sistors and the data bus should be floating during

reset, a resistor value of 47K

Ω should be suffi-

cient.

Power-on reset FBA[9:0] bit assignments

[9]

PCI Mode. This bit indicates whether the RIVA 128 initializes with PCI 2.1 compliance

0 = RIVA 128 is PCI 2.0 compliant (does not support delayed transactions)

1 = RIVA 128 is PCI 2.1 compliant (supports 16 clock target latency requirement).

[8:7]

TV Mode. These bits select the timing format when TV mode is enabled.

00 = Reserved

01 = NTSC

10 = PAL

11 = TV mode disabled

[6]

Crystal Frequency. This bit should match the frequency of the crystal or reference clock connect-

ed to XTALOUT and XTALIN.

0 = 13.500MHz (used where TV output may be enabled)

1 = 14.31818MHz

[5]

Host Interface

0 = PCI

1 = AGP (Bit 0 must also be pulled high to indicate 66MHz)

[4]

RAM Width

0 = 64-bit framebuffer data bus width (the upper 64-bit data bus and byte selects are tri-state)

1 = 128-bit framebuffer data bus width

[3:2]

RAM Type

00 = Reserved

01 = 8Mbit SDRAM or SGRAM organized as 128K x 2 banks x 32-bit (normal SGRAM mode).

10 = Reserved

11 = 8Mbit SDRAM or SGRAM organized as 128K x 2 banks x 32-bit, framebuffer I/O pins remain

tri-stated after reset.

[1]

Sub-Vendor. This bit indicates whether the PCI Subsystem Vendor field is located in the system

motherboard BIOS or adapter card VGA BIOS. If the Subsystem Vendor field is located in the sys-

tem BIOS it must be written by the system BIOS to the PCI configuration space prior to running

any PnP code.

0 = System BIOS (Subsystem Vendor ID and Subsystem ID set to 0x0000)

1 = Adapter card VGA BIOS (Subsystem Vendor ID and Subsystem ID read from ROM BIOS at

location 0x54 - 0x57)

[0]

Bus Speed. This bit indicates the value returned in the 66MHZ bit in the PCI Configuration regis-

ters (see page 64).

0 = RIVA 128 PCI interface is 33MHz

1 = RIVA 128 is 66MHz capable

543

PCI

Mode

TV Mode

Crystal

Host

Interface

RAM

Width

RAM Type

Sub-

Vendor

Bus

Speed

RIVA128 데이터시트(PDF) 49 Page - STMicroelectronics

RIVA128 데이터시트(HTML) 49 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

데이터시트 다운로드

링크 URL