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H8SX1663 데이터시트(PDF) 34 Page - Renesas Technology Corp

부품명 H8SX1663
상세설명  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 데이터시트(HTML) 34 Page - Renesas Technology Corp

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Rev.1.00 Jun. 07, 2006 Page xxxiv of lii
Figure 7.26 Example of Transfer in Normal Transfer Mode by Cycle Stealing (Transfer
Destination DDAR = Odd Address and Destination Address Decrement)............. 372
Figure 7.27 Example of Transfer in Normal Transfer Mode by Burst Access ........................... 373
Figure 7.28 Example of Transfer in Block Transfer Mode......................................................... 374
Figure 7.29 Example of Transfer in Normal Transfer Mode Activated
by
DREQ Falling Edge........................................................................................... 375
Figure 7.30 Example of Transfer in Block Transfer Mode Activated
by
DREQ Falling Edge........................................................................................... 376
Figure 7.31 Example of Transfer in Normal Transfer Mode Activated
by
DREQ Low Level .............................................................................................. 377
Figure 7.32 Example of Transfer in Block Transfer Mode Activated
by
DREQ Low Level .............................................................................................. 378
Figure 7.33 Example of Transfer in Normal Transfer Mode Activated
by
DREQ Low Level with NRD = 1 ...................................................................... 379
Figure 7.34 Example of Transfer in Single Address Mode (Byte Read) .................................... 380
Figure 7.35 Example of Transfer in Single Address Mode (Byte Write) ................................... 381
Figure 7.36 Example of Transfer in Single Address Mode Activated
by
DREQ Falling Edge........................................................................................... 382
Figure 7.37 Example of Transfer in Single Address Mode Activated
by
DREQ Low Level .............................................................................................. 383
Figure 7.38 Example of Transfer in Single Address Mode Activated
by
DREQ Low Level with NRD = 1 ...................................................................... 384
Figure 7.39 Interrupt and Interrupt Sources................................................................................ 392
Figure 7.40 Procedure Example of Resuming Transfer by Clearing Interrupt Source ............... 392
Section 8 Data Transfer Controller (DTC)
Figure 8.1 Block Diagram of DTC ............................................................................................. 396
Figure 8.2 Transfer Information on Data Area ........................................................................... 406
Figure 8.3 Correspondence between DTC Vector Address and Transfer Information............... 406
Figure 8.4 Flowchart of DTC Operation .................................................................................... 410
Figure 8.5 Bus Cycle Division Example .................................................................................... 412
Figure 8.6 Transfer Information Read Skip Timing ................................................................... 413
Figure 8.7 Memory Map in Normal Transfer Mode................................................................... 415
Figure 8.8 Memory Map in Repeat Transfer Mode
(When Transfer Source is Specified as Repeat Area)............................................... 416
Figure 8.9 Memory Map in Block Transfer Mode
(When Transfer Destination is Specified as Block Area) ......................................... 417
Figure 8.10 Operation of Chain Transfer.................................................................................... 418
Figure 8.11 DTC Operation Timing (Example of Short Address Mode
in Normal Transfer Mode or Repeat Transfer Mode).............................................. 419



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