전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

H8SX1663 데이터시트(PDF) 100 Page - Renesas Technology Corp

부품명 H8SX1663
상세설명  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1663 데이터시트(HTML) 100 Page - Renesas Technology Corp

Back Button H8SX1663 Datasheet HTML 96Page - Renesas Technology Corp H8SX1663 Datasheet HTML 97Page - Renesas Technology Corp H8SX1663 Datasheet HTML 98Page - Renesas Technology Corp H8SX1663 Datasheet HTML 99Page - Renesas Technology Corp H8SX1663 Datasheet HTML 100Page - Renesas Technology Corp H8SX1663 Datasheet HTML 101Page - Renesas Technology Corp H8SX1663 Datasheet HTML 102Page - Renesas Technology Corp H8SX1663 Datasheet HTML 103Page - Renesas Technology Corp H8SX1663 Datasheet HTML 104Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 100 / 1158 page
background image
Section 2 CPU
Rev.1.00 Jun. 07, 2006 Page 48 of 1102
REJ09B0294-0100
Instruction
Size
Function
DIVU
W/L
Rd
÷ Rs → Rd
Performs unsigned division on data in two general registers: either 16 bits
÷ 16 bits → 16-bit quotient, or 32 bits ÷ 32 bits → 32-bit quotient.
DIVXS
B/W
Rd
÷ Rs → Rd
Performs signed division on data in two general registers: either 16 bits
÷
8 bits
→ 8-bit quotient and 8-bit remainder, or 32 bits ÷ 16 bits → 16-bit
quotient and 16-bit remainder.
DIVS
W/L
Rd
÷ Rs → Rd
Performs signed division on data in two general registers: either 16 bits
÷
16 bits
→ 16-bit quotient, or 32 bits ÷ 32 bits → 32-bit quotient.
CMP
B/W/L
(EAd)
− #IMM, (EAd) − (EAs)
Compares data between immediate data, general registers, and memory
and stores the result in CCR.
NEG
B/W/L
0
− (EAd) → (EAd)
Takes the two's complement (arithmetic complement) of data in a general
register or the contents of a memory location.
EXTU
W/L
(EAd) (zero extension)
→ (EAd)
Performs zero-extension on the lower 8 or 16 bits of data in a general
register or memory to word or longword size.
The lower 8 bits to word or longword, or the lower 16 bits to longword can
be zero-extended.
EXTS
W/L
(EAd) (sign extension)
→ (EAd)
Performs sign-extension on the lower 8 or 16 bits of data in a general
register or memory to word or longword size.
The lower 8 bits to word or longword, or the lower 16 bits to longword can
be sign-extended.
TAS
B
@ERd
− 0, 1 → (<bit 7> of @EAd)
Tests memory contents, and sets the most significant bit (bit 7) to 1.
MAC
(EAs)
× (EAd) + MAC → MAC
Performs signed multiplication on memory contents and adds the result to
MAC.
CLRMAC
0
→ MAC
Clears MAC to zero.
LDMAC
Rs
→ MAC
Loads data from a general register to MAC.
STMAC
MAC
→ Rd
Stores data from MAC to a general register.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com