H8SX1663 datasheet(49/1158 Pages) RENESAS

49 / 1158 page

Rev.1.00 Jun. 07, 2006 Page xlix of lii

Table 12.7

Switching of Internal Clock and TCNT Operation ............................................... 634

Section 13 32K Timer (TM32K)

Table 13.1

TM32K Interrupt Source....................................................................................... 640

Section 14 Watchdog Timer (WDT)

Table 14.1

Pin Configuration.................................................................................................. 642

Table 14.2

WDT Interrupt Source .......................................................................................... 648

Section 15 Serial Communication Interface (SCI, IrDA, CRC)

Table 15.1

Function List of SCI Channels.............................................................................. 655

Table 15.2

Pin Configuration.................................................................................................. 658

Table 15.3

Relationships between N Setting in BRR and Bit Rate B..................................... 681

Table 15.4

Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (1) ...... 682

Table 15.4

Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2) ...... 683

Table 15.5

Maximum Bit Rate for Each Operating Frequency (Asynchronous Mode).......... 684

Table 15.6

Maximum Bit Rate with External Clock Input (Asynchronous Mode) ................ 685

Table 15.7

BRR Settings for Various Bit Rates (Clocked Synchronous Mode)..................... 686

Table 15.8

Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode) .... 686

Table 15.9

BRR Settings for Various Bit Rates

(Smart Card Interface Mode, n = 0, S = 372)........................................................ 687

Table 15.10

Maximum Bit Rate for Each Operating Frequency

(Smart Card Interface Mode, S = 372).............................................................. 687

Table 15.11

Serial Transfer Formats (Asynchronous Mode)................................................ 699

Table 15.12

SSR Status Flags and Receive Data Handling .................................................. 706

Table 15.13

IrCKS2 to IrCKS0 Bit Settings......................................................................... 735

Table 15.14

SCI Interrupt Sources (SCI_0, 1, 2, and 4) ....................................................... 736

Table 15.15

SCI Interrupt Sources (SCI_5 and SCI_6) ........................................................ 737

Table 15.16

SCI Interrupt Sources (SCI_0, 1, 2, and 4) ....................................................... 737

Table 15.17

SCI Interrupt Sources (SCI_5 and SCI_6) ........................................................ 737

Section 16 USB Function Module (USB)

Table 16.1

Pin Configuration.................................................................................................. 752

Table 16.2

Example of Limitations for Setting Values........................................................... 780

Table 16.3

Example of Setting................................................................................................ 781

Table 16.4

Relationship between TRNTREG0 Setting and Pin Output ................................. 783

Table 16.5

Relationship between Pin Input and TRNTREG1 Monitoring Value................... 785

Table 16.6

Interrupt Sources................................................................................................... 786

Table 16.7

Command Decoding on Application Side............................................................. 805

Table 16.8

Selection of Peripheral Clock (P

φ) when USB is Connected................................815

Section 17 I2C Bus Interface2 (IIC2)

Table 17.1

Pin Configuration of the I2C Bus Interface 2 ........................................................ 819

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