H8SX1663 datasheet(109/1158 Pages) RENESAS

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Section 2 CPU

Rev.1.00 Jun. 07, 2006 Page 57 of 1102

REJ09B0294-0100

2.8.5

or Post-Decrement—@ERn

+, @−ERn, @+ERn, or @ERn−

• Register indirect with post-increment—@ERn+

The operand value is the contents of a memory location which is pointed to by the contents of

an address register (ERn). ERn is specified by the register field of the instruction code. After

the memory location is accessed, 1, 2, or 4 is added to the address register contents and the

sum is stored in the address register. The value added is 1 for byte access, 2 for word access, or

4 for longword access.

• Register indirect with pre-decrement—@−ERn

The operand value is the contents of a memory location which is pointed to by the following

operation result: the value 1, 2, or 4 is subtracted from the contents of an address register

(ERn). ERn is specified by the register field of the instruction code. After that, the operand

value is stored in the address register. The value subtracted is 1 for byte access, 2 for word

access, or 4 for longword access.

• Register indirect with pre-increment—@+ERn

The operand value is the contents of a memory location which is pointed to by the following

operation result: the value 1, 2, or 4 is added to the contents of an address register (ERn). ERn

is specified by the register field of the instruction code. After that, the operand value is stored

in the address register. The value added is 1 for byte access, 2 for word access, or 4 for

longword access.

• Register indirect with post-decrement—@ERn−

The operand value is the contents of a memory location which is pointed to by the contents of

an address register (ERn). ERn is specified by the register field of the instruction code. After

the memory location is accessed, 1, 2, or 4 is subtracted from the address register contents and

the remainder is stored in the address register. The value subtracted is 1 for byte access, 2 for

word access, or 4 for longword access.

using this addressing mode, data to be written is the contents of the general register after

calculating an effective address. If the same general register is specified in an instruction and two

effective addresses are calculated, the contents of the general register after the first calculation of

an effective address is used in the second calculation of an effective address.

Example 1:

MOV.W

R0, @ER0

When ER0 before execution is H'12345678, H'567A is written at H'12345678.

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