H8SX1663 datasheet(133/1158 Pages) RENESAS

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Section 4 Exception Handling

Rev.1.00 Jun. 07, 2006 Page 81 of 1102

REJ09B0294-0100

4.3.2

Interrupts after Reset

If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and

CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,

including NMI, are disabled immediately after a reset. Since the first instruction of a program is

always executed immediately after the reset state ends, make sure that this instruction initializes

the stack pointer (example: MOV.L #xx: 32, SP).

4.3.3

On-Chip Peripheral Functions after Reset Release

After the reset state is released, MSTPCRA and MSTPCRB are initialized to H'0FFF and H'FFFF,

respectively, and all modules except the DTC and DMAC enter the module stop state.

Consequently, on-chip peripheral module registers cannot be read or written to. Register reading

and writing is enabled when the module stop state is canceled.

RES

High

Vector

fetch

Internal

operation

First

instruction

prefetch

(1): Reset exception handling vector address (when reset, (1) = H'000000)

(2): Start address (contents of reset exception handling vector address)

(3) Start address ((3) = (2))

(4) First instruction in the exception handling routine

Internal

address bus

Internal read

signal

Internal write

signal

Internal data

bus

(1)

(2)

(4)

(3)

Figure 4.1 Reset Sequence (On-chip ROM Enabled Advanced Mode)

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