H8SX1663 datasheet(232/1158 Pages) RENESAS

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Section 6 Bus Controller (BSC)

Rev.1.00 Jun. 07, 2006 Page 180 of 1102

REJ09B0294-0100

Table 6.5

Areas Specifiable for Each Interface

Areas

Interface

Registers

Basic interface

Byte control SRAM interface

SRAMCR

Burst ROM interface

BROMCR



Address/data multiplexed I/O

interface

MPXCR



(2) Bus Width

A bus width of 8 or 16 bits can be selected with ABWCR. An area for which an 8-bit bus is

selected functions as an 8-bit access space and an area for which a 16-bit bus is selected functions

as a 16-bit access space. In addition, the bus width of address/data multiplexed I/O space is 8 bits

or 16 bits, and the bus width for the byte control SRAM space is 16 bits.

The initial state of the bus width is specified by the operating mode.

If all areas are designated as 8-bit access space, 8-bit bus mode is set; if any area is designated as

16-bit access space, 16-bit bus mode is set.

(3) Endian Format

Though the endian format of this LSI is big endian, data can be converted into little endian format

when reading or writing to the external address space.

Areas 7 to 2 can be specified as either big endian or little endian format by the LE7 to LE2 bits in

ENDIANCR.

The initial state of each area is the big endian format.

Note that the data format for the areas used as a program area or a stack area should be big endian.

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