M16CSLASH1N datasheet(118/238 Pages) RENESAS

118 / 238 page

Rev.1.00

Oct 20, 2004

page 106 of 222

M16C/1N Group

12. Timers

REJ09B0007-0100Z

(b15)

(b8)

Timer C

Symbol

Address

009116, 009016

When reset

Indeterminate

Function

Internal count source is counted

(b15)

(b8)

Time measurement register

Symbol

Address

009C16, 009D16

When reset

Indeterminate

Function

When active edge of measurement pulse is input, the count value of Timer C

is stored (Note 1)

Note 1: When time measurement is disabled, the value is indeterminate. After enabling time measurement, the

value is indeterminate until the first trigger is generated.

Note 1: Change this bit when time measurement is disabled.

Note 2: Set the on-chip oscillation stop bit (CM14) to "0" before setting this bit to "1".

Note 3: Change this bit when the interrupt is disabled. When switching the timer measurement input source, the TCIN

interrupt may be requested. Therefore, enable the interrupt after setting the interrupt request bit to "0".

b5 b4

Timer C control register 0

TCC00

Time measurement control bit

0 : Time measurement disabled

1 : Time measurement enabled

TCC07

Time measurement input

source switching bit

(Note 1 to 3)

0 : TCIN

1 : fRING256

TCC01

Timer C clock select bit

(Note 1)

TCC02

Symbol

TCC0

Address

009A16

When reset

0XX000002

Function

Bit name

Bit symbol

0 0 : f1

0 1 : f8

1 0 : f32

1 1 : Inhibited

b2 b1

TCC03

Nothing is assigned.

When write, set "0". When read, their contents are "0".

Nothing is assigned.

When write, set "0". When read, their contents are "0".

b5 b4

Timer C control register 1

TCC10

Digital filter clock select bit

(Note 1)

TCC11

Symbol

TCC1

Address

009B16

When reset

XXXXXX112

Function

Bit name

Bit symbol

0 0 : Inhibited

0 1 : f1

1 0 : f8

1 1 : f32

b1 b0

Time measurement input edge

trigger bit

(Note 1)

TCC04

0 0 : Rising edge

0 1 : Falling edge

1 0 : Both edges

1 1 : Inhibited

b4 b3

Note 1: Input edge becomes active when the same value from TCIN pin is sampled three times in succession.

Figure 12.32 Timer C-related register

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