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M16C/1N 데이터시트(PDF) 224 Page - Renesas Technology Corp |
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M16C/1N 데이터시트(HTML) 224 Page - Renesas Technology Corp |
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224 / 238 page ![]() Rev.1.00 Oct 20, 2004 page 212 of 222 M16C/1N Group REJ090007-0100Z 20. Precautionary Notes in Using the Device 20.5 A/D Converter 1. Only write to each bit (except bit 6) of the AD Control Register 0, or each bit of the AD Control Register 1, or bit 0 of the AD Control Register 2 when AD conversion is stopped (before a trigger occurs). When the VREF connection bit is changed from "0" to "1", wait 1 µs or longer before starting AD conversion. 2. To prevent noise-induced device malfunction or latchup, as well as to reduce conversion errors, insert capacitors between the VCC, VREF, and analog input pins (ANi) each and the VSS pin. Figure 20.1 shows an example connection of each pin. 3. Make sure the port direction bits for those pins that are used as analog inputs are set to "0" (input mode). 4. ____ When setting the KIi input enable bit to "1" (Enabled) to use key input interrupt and using AN8 to AN11 as analog input pins, be careful about the following points. • A key input interrupt request is generated when the A/D input voltage goes "LOW". • If the A/D input voltage approaches 1/2 VCC, power supply current may increase due to pass ____ current on schmitt circuit of key input interrupt. (When setting the KIi input enable bit to "0" (Disabled), pass current doesn't flow.) 5. The ØAD frequency must be 10 MHz or less. Without sample-and-hold function, limit the ØAD frequency to 250 kHz or more. With the sample and hold function, limit the ØAD frequency to 1 MHz or more. Figure 20.1 Example connection of each pin Note 1: C1 ≥0.47µF, C2≥0.47µF, C3≥100pF (reference). Note 2: Use thick and shortest possible wiring to connect capacitors. Microcomputer VREF VCC C1 C2 C3 VSS ANi |
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