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SH7052 데이터시트(PDF) 344 Page - Renesas Technology Corp |
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SH7052 데이터시트(HTML) 344 Page - Renesas Technology Corp |
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344 / 919 page ![]() 318 10.2.25 Reload Register (RLDR) The reload register is a 16-bit register. The ATU-II has one RLDR register in channel 8. Reload Register 8 (RLDR8) Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W RLDR8 is a 16-bit readable/writable register. When reload is enabled (by a setting in RLDENR) and DSTR8I to DSTR8P are set to 1 by the channel 2 compare-match signal one-shot pulse start trigger, the reload register value is transferred to DCNT8I to DCNT8P before the down-count is started. The reload register value is not transferred when the one-shot pulse function is used independently, without linkage to channel 2, or when down-counters DCNT8I to DCNT8P are running. RLDR8 can only be accessed by a word read or write. RLDR is initialized to H'0000 by a power-on reset, and in hardware standby mode and software standby mode. 10.2.26 Channel 10 Registers Counters (TCNT) Channel 10 has seven TCNT counters: one 32-bit TCNT, four 16-bit TCNTs, and two 8-bit TCNTs. The input clock is selected with prescaler register 4 (PSCR4). Count operations are performed by setting STR10 to 1 in timer start register 1 (TSTR1). Channel Abbreviation Function 10 TCNT10AH, AL 32-bit free-running counter (initial value H'00000001) TCNT10B 8-bit event counter (initial value H'00) TCNT10C 16-bit reload counter (initial value H'0001) TCNT10D 8-bit correction counter (initial value H'00) TCNT10E 16-bit correction counter (initial value H'0000) TCNT10F 16-bit correction counter (initial value H'0001) TCNT10G 16-bit free-running counter (initial value H'0000) |
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