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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SH7052 데이터시트(PDF) 152 Page - Renesas Technology Corp |
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SH7052 데이터시트(HTML) 152 Page - Renesas Technology Corp |
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152 / 919 page  126 Bit 1: SW1 Description 0 No CS1 space CS assert extension 1 CS1 space CS assert extension (Initial value) Bit 0: SW0 Description 0 No CS0 space CS assert extension 1 CS0 space CS assert extension (Initial value) 8.2.3 Wait Control Register (WCR) Bit: 15 14 13 12 11 10 9 8 W33 W32 W31 W30 W23 W22 W21 W20 Initial value: 1 1 1 1 1 1 1 1 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bit: 7 6 5 4 3 2 1 0 W13 W12 W11 W10 W03 W02 W01 W00 Initial value: 1 1 1 1 1 1 1 1 R/W: R/W R/W R/W R/W R/W R/W R/W R/W WCR is a 16-bit readable/writable register that specifies the number of wait cycles for each CS space. WCR1 is initialized to H'FFFF by a power-on reset and in hardware standby mode. It is not initialized by a manual reset or in software standby mode. • Bits 15 to 12—CS3 Space Wait Specification (W33, W32, W31, W30): These bits specify the number of waits for CS3 space access. Bit 15: W33 Bit 14: W32 Bit 13: W31 Bit 12: W30 Description 0000No wait (external wait input disabled) 00011 wait external wait input enabled ⋅⋅⋅ 111115 wait external wait input enabled (Initial value) |
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