SH7052 datasheet(154/919 Pages) RENESAS

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8.2.4

RAM Emulation Register (RAMER)

Bit:

——

———

—

Initial value:

R/W:

Bit:

—

RAMS

RAM2

RAM1

RAM0

Initial value:

R/W:

R/W

The RAM emulation register (RAMER) is a 16-bit readable/writable register that selects the RAM

area to be used when emulating realtime programming of flash memory.

RAMER is initialized to H'0000 by a power-on reset and in hardware standby mode. It is not

initialized by a manual reset or in software standby mode.

Note:

To ensure correct operation of the RAM emulation function, the ROM for which RAM

emulation is performed should not be accessed immediately after this register has been

modified. Operation cannot be guaranteed if such an access is made.

• Bits 15 to 4—Reserved: Only 0 should be written to these bits. Operation cannot be guaranteed

if 1 is written.

• Bit 3—RAM Select (RAMS): Used together with bits 2 to 0 to select or deselect flash memory

emulation by RAM (table 8.6).

When 1 is written to this bit, all flash memory blocks are write/erase-protected.

This bit is ignored in modes with on-chip ROM disabled.

• Bits 2 to 0—RAM Area Specification (RAM2 to RAM0): These bits are used together with the

RAMS bit to designate the flash memory area to be overlapped onto RAM (table 8.6).

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