SH7052 datasheet(244/919 Pages) RENESAS

244 / 919 page

218

Timer Control Register 11 (TCR11)

Bit:

76543210

——

CKEG1

CKEG0

—

CKSELA2 CKSELA1 CKSELA0

Initial value:

00000000

R/W:

R/W

• Bits 7, 6, and 3—Reserved: These bits always read 0. The write value should always be 0.

• Bits 5 and 4—Edge Select: These bits select the event counter counted edge(s).

Bit 5: CKEG1

Bit 4: CKEG0

Description

Rising edges counted

(Initial value)

Falling edges counted

Both rising and falling edges counted

Count disabled

• Bits 2 to 0—Clock Select A2 to A0 (CKSELA2 to CKSELA0): These bits select clock φ",

scaled from the internal clock source, from

φ', φ'/2, φ'/4, φ'/8, φ'/16, and φ'/32.

Bit 2:

CKSELA2

Bit 1:

CKSELA1

Bit 0:

CKSELA0

Description

Internal clock

φ": counting on φ'

(Initial value)

Internal clock

φ": counting on φ'/2

Internal clock

φ": counting on φ'/4

Internal clock

φ": counting on φ'/8

Internal clock

φ": counting on φ'/16

Internal clock

φ": counting on φ'/32

External clock: counting on TCLKA pin input

External clock: counting on TCLKB pin input

SH7052 데이터시트(PDF) 244 Page - Renesas Technology Corp

SH7052 데이터시트(HTML) 244 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL