| 전자부품 데이터시트 검색엔진 |
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SH7052 데이터시트(PDF) 262 Page - Renesas Technology Corp |
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SH7052 데이터시트(HTML) 262 Page - Renesas Technology Corp |
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262 / 919 page ![]() 236 • Bit 5—Input Capture/Compare-Match Flag 1F (IMF1F): Status flag that indicates GR1F input capture or compare-match. Bit 5: IMF1F Description 0 [Clearing condition] (Initial value) When IMF1F is read while set to 1, then 0 is written to IMF1F 1 [Setting conditions] •••• When the TCNT1A value is transferred to GR1F by an input capture signal while GR1F is functioning as an input capture register •••• When TCNT1A = GR1F while GR1F is functioning as an output compare register • Bit 4—Input Capture/Compare-Match Flag 1E (IMF1E): Status flag that indicates GR1E input capture or compare-match. Bit 4: IMF1E Description 0 [Clearing condition] (Initial value) When IMF1E is read while set to 1, then 0 is written to IMF1E 1 [Setting conditions] •••• When the TCNT1A value is transferred to GR1E by an input capture signal while GR1E is functioning as an input capture register •••• When TCNT1A = GR1E while GR1E is functioning as an output compare register • Bit 3—Input Capture/Compare-Match Flag 1D (IMF1D): Status flag that indicates GR1D input capture or compare-match. Bit 3: IMF1D Description 0 [Clearing condition] (Initial value) When IMF1D is read while set to 1, then 0 is written to IMF1D 1 [Setting conditions] •••• When the TCNT1A value is transferred to GR1D by an input capture signal while GR1D is functioning as an input capture register •••• When TCNT1A = GR1D while GR1D is functioning as an output compare register |
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