| 전자부품 데이터시트 검색엔진 |
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SH7052 데이터시트(PDF) 266 Page - Renesas Technology Corp |
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SH7052 데이터시트(HTML) 266 Page - Renesas Technology Corp |
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266 / 919 page ![]() 240 • Bit 6—Input Capture/Compare-Match Flag 2G (IMF2G): Status flag that indicates GR2G input capture or compare-match. Bit 6: IMF2G Description 0 [Clearing condition] (Initial value) When IMF2G is read while set to 1, then 0 is written to IMF2G 1 [Setting conditions] • When the TCNT2A value is transferred to GR2G by an input capture signal while GR2G is functioning as an input capture register •••• When TCNT2A = GR2G while GR2G is functioning as an output compare register • Bit 5—Input Capture/Compare-Match Flag 2F (IMF2F): Status flag that indicates GR2F input capture or compare-match. Bit 5: IMF2F Description 0 [Clearing condition] (Initial value) When IMF2F is read while set to 1, then 0 is written to IMF2F 1 [Setting conditions] • When the TCNT2A value is transferred to GR2F by an input capture signal while GR2F is functioning as an input capture register •••• When TCNT2A = GR2F while GR2F is functioning as an output compare register • Bit 4—Input Capture/Compare-Match Flag 2E (IMF2E): Status flag that indicates GR2E input capture or compare-match. Bit 4: IMF2E Description 0 [Clearing condition] (Initial value) When IMF2E is read while set to 1, then 0 is written to IMF2E 1 [Setting conditions] • When the TCNT2A value is transferred to GR2E by an input capture signal while GR2E is functioning as an input capture register •••• When TCNT2A = GR2E while GR2E is functioning as an output compare register |
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