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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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7721 데이터시트(PDF) 239 Page - Renesas Technology Corp |
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7721 데이터시트(HTML) 239 Page - Renesas Technology Corp |
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239 / 577 page  SERIAL I/O 7721 Group User’s Manual 11–36 11.4 Clock asynchronous serial I/O (UART) mode Fig. 11.4.4 Writing data after start of transmission [When not using interrupts] [When using interrupts] A UARTi transmit interrupt request occurs when the UARTi transmit buffer register becomes empty. UARTi transmit interrupt Note : UART0 transmit buffer register (Addresses 3316, 3216) UART1 transmit buffer register (Addresses 3B16, 3A16) b7 b0 Writing of next transmit data Set transmit data here. b0 UART0 transmit/receive control register 1 (Address 3516) UART1 transmit/receive control register 1 (Address 3D16) b7 Transmit buffer empty flag 0: Data present in transmit buffer register 1: No data present in transmit buffer register (Writing of next transmit data is possible.) Checking state of UARTi transmit buffer register 1 This figure shows the bits and registers required for processing. Refer to “Figures 11.4.6 to 11.4.8” for the change of flag state and the occurrence timing of an interrupt request. b0 b8 b15 |
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