7733 datasheet(183/940 Pages) RENESAS

183 / 940 page

TIMER B

7733 Group User’s Manual

7–20

7.4 Event counter mode

Fig. 7.4.2 Initial setting example for registers related to event counter mode

g Counter divides count source frequency by (n + 1).

Setting of the division ratio

Values 000016 to FFFF16 (n) can be set.

(b15)

(b8)

Timer B0 register (addresses 5116, 5016)

Timer B1 register (addresses 5316, 5216)

Timer B2 register (addresses 5516, 5416)

Counting is started.

0 0: Counts at falling edge of external signal.

0 1: Counts at rising edge of external signal.

1 0: Counts at both of falling and rising edges of external signal.

1 1: Do not select.

Selection of the event counter mode and the count polarity

Timer Bi mode register (i = 0 to 2) (addresses 5B16 to 5D16)

Setting of the count start flag to “1”

Count start flag (address 4016)

Timer B0 count start flag

Timer B1 count start flag

Timer B2 count start flag

X: It may be “0” or “1.”

b3b2

Setting of the interrupt priority level

Timer Bi interrupt control register

(addresses 7A16 to 7C16)

Interrupt priority level selection bits

When using interrupts, one of levels 1 to 7 must be set.

When disabling interrupts, level 0 must be set.

Setting of the port P6 direction register

Port P6 direction register (address 1016)

Clear the corresponding bit to “0.”

Must be fixed to “0” (for i = 0).

Pin TB0IN

Pin TB1IN

Pin TB2IN

Event counter mode is selected.

Count polarity selection bits

XX 0

Selection of the timer B1 internal connection

Port function control register (address 6D16)

Timer B1 internal connect selection bit

0: No internal connection

1: Internal connection with timer B2

7733 데이터시트(PDF) 183 Page - Renesas Technology Corp

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