| 전자부품 데이터시트 검색엔진 |
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7733 데이터시트(PDF) 198 Page - Renesas Technology Corp |
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7733 데이터시트(HTML) 198 Page - Renesas Technology Corp |
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198 / 940 page ![]() TIMER B 7733 Group User’s Manual 7–35 Fig. 7.6.1 Structures of timer B2 mode register and timer B2 register when clock timer is used At reset Functions 0 0 Un- defined Un- defined 0 0 RW Bit 3 Must be fixed to “0” for the clock timer. b7 b6 b5 b4 b3 b2 b1 b0 Timer B2 mode register (address 5D16) 1 0 1 0 0 0 6 These bits are ignored for the clock timer. 5 This bit is ignored for the clock timer. b7 b0 b7 b0 (b15) (b8) Timer B2 register (addresses 5516 and 5416) Functions Bit At reset RW 15 to 0 Values 000016 to FFFF16 can be set. Assuming that the set value = n, counter divides the count source frequency by (n + 1). At reading this register, the counter value is read out. Un- defined 2 Must be fixed to “1” for the clock timer. 1 Must be fixed to “0” for the clock timer. 0 Must be fixed to “1” for the clock timer. 4 Not implemented. X 7 XX RW RW RW RW — RO RW RW RW 7.6 Clock timer |
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