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7733 데이터시트(PDF) 276 Page - Renesas Technology Corp |
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7733 데이터시트(HTML) 276 Page - Renesas Technology Corp |
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276 / 940 page ![]() A-D CONVERTER 7733 Group User’s Manual 9–11 9.3 A-D conversion method The A-D converter compares the comparison voltage (Vref), which is internally generated according to the contents of the successive approximation register, and the analog input voltage (VIN), which is input from the analog input pin. By reflecting the comparison result on the successive approximation register, VIN is converted into a digital value (successive approximation method). When a trigger occurs, the A-D converter performs the following processing: Determination of successive approximation register’s bit 9 The A-D converter compares Vref and VIN. At this time, contents of the successive approximation register is “10000000002” (Initial value). Bit 9 of the successive approximation register changes according to the comparison result as follows: If Vref < VIN, bit 9 = “1” If Vref > VIN, bit 9 = “0” Determination of successive approximation register’s bit 8 After setting bit 8 of the successive approximation register to “1,” the A-D converter compares Vref and VIN. Bit 8 changes according to the comparison result as follows: If Vref < VIN, bit 8 = “1” If Vref > VIN, bit 8 = “0” Determination of successive approximation register’s bits 7 to LSB When resolution = 8 bits ........... For bits 7 to 2, perform operation . When resolution = 10 bits ......... For bits 7 to 0, perform operation . When the LSB is determined, the contents of the successive approximation register, in other words, the conversion result is transferred to the A-D register i. Vref is generated according to the latest contents of the successive approximation register. Table 9.3.1 lists the relationship between the successive approximation register’s contents and Vref. Tables 9.3.2 and 9.3.3 list changes of the successive approximation register and Vref during A-D conversion. Figure 9.3.1 shows theoretical A-D conversion characteristics when resolution = 10 bits. Table 9.3.1 Relationship between successive approximation register’s contents and Vref 9.3 A-D conversion method 1 to 1023 × (n – 0.5) VREFV: Reference voltage VREFV 1024 Successive approximation register’s contents: n 0 Vref (V) 0 |
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