| 전자부품 데이터시트 검색엔진 |
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7733 데이터시트(PDF) 305 Page - Renesas Technology Corp |
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7733 데이터시트(HTML) 305 Page - Renesas Technology Corp |
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305 / 940 page ![]() WATCHDOG TIMER 7733 Group User’s Manual 10-8 10.2 Operation description 10.2.4 Operation in hold state The watchdog timer stops operating in the hold state. (Refer to section “12.4 Hold function.”) When the hold state is terminated, the watchdog timer restarts counting from the same state as that before the watchdog timer stops. Fig. 10.2.1 Structure of oscillation circuit control register 0 Bit Bit name Functions At reset RW 0 1 2 3 4 5 6 7 XCOUT drivability selection bit Main clock stop bit System clock selection bit Port-Xc selection bit Not implemented. 0 0 0 0 Un- defined 0 0: Drivability “LOW” 1: Drivability “HIGH” When the port-Xc selection bit = “0,” 0: Main clock 1: Main clock divided by 8 When the port-Xc selection bit = “1,” 0: Main clock 1: Sub clock 1 Un- defined Oscillation circuit control register 0 (address 6C16) b1 b0 b2 b3 b4 b5 b6 b7 Notes 0: Main clock oscillation or external clock input is available. 1: Main clock oscillation or external clock input is stopped. RW RW _ Not implemented. _ RW (Note 1) 0: Operate as I/O ports (P77, P76). 1: Operate as pins XCIN and XCOUT. RW (Notes 2 and 3) RW (Note 2) System clock stop bit at wait state 0: Output is enabled. 1: Output is disabled. (Refer to Tables 12.1.2 and 12.1.5) 0: Operates in the wait mode. 1: Stopped in the wait mode. Signal output disable selection bit RW (Note 1) 1: Nothing can be written to this bit after reset. Writing to this bit is enabled when the port-Xc selection bit = “1.” 2: When selecting the sub clock as the system clock, set bit 3 to “1” after setting bit 4 to “1.” If the above settings are performed simultaneously, in other words, performed by executing only one instruction, only bit 3 is set to “1.” 3: Although this bit can be set to “1,” it cannot be cleared to “0” after this bit is once set to “1.” 4: represents that bits 0 to 2 and bit 7 are not used for the watchdog timer. |
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