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STOP AND WAIT MODES

7733 Group User’s Manual

11–9

11.3.2 Stop mode terminating operation by interrupt request occurrence (when using watchdog timer)

When there is little possibility that a clock is stably supplied from an oscillation circuit (Note 1) in returning

from the stop mode, instruction execution can be started after a certain time (Note 2) measured by the

watchdog timer.

Notes 1: A clock is supplied in one of the following ways:

q An oscillation circuit operates by itself.

q An external clock is input.

2: “a certain time” means an interval from occurrence of an interrupt request until stabilization of

clock supply.

When an interrupt request occurs, an oscillator starts oscillating. Simultaneously, supply of clocks f2 to

f512 starts.

By start of oscillation, the watchdog timer starts counting. The watchdog timer counts f32 when the

system clock selection bit (bit 3 at address 6C16; Refer to Figure 11.2.2.) = “0” or f8 when the system

clock selection bit = “1.”

When the watchdog timer’s MSB becomes “0,” supply of internal clock

φ starts. At the same time, the

watchdog timer’s count source returns to a count source (clock f32 or f512) which is selected by the

watchdog timer frequency selection flag (bit 0 at address 6116).

The interrupt request which occurs in is accepted.

Table 11.3.3 lists interrupts which can be used for termination of the stop mode.

Table 11.3.3 Interrupts which can be used for termination of stop mode

When the key input interrupt function is selected

____

INT2

interrupt: When the key input interrupt function is invalid.

In the event counter mode

When the external clock is selected

Interrupt

Conditions for each function which generates

interrupt request

Key input interrupt

____

INTi

interrupt (i = 0 to 2)

Timer Ai interrupt (i = 0 to 4)

Timer Bi interrupt (i = 0 to 2)

UARTi transmission interrupt (i = 0, 1)

UARTi reception interrupt (i = 0, 1)

UART2 transmission/reception interrupt

Note 1: Because an oscillator has stopped oscillating, each function is available only in the conditions listed

in Table 11.3.3. Note that the A-D converter and clock timer (Refer to section “7.6 Clock timer”)

do not operate, also.

2: Because an oscillator has stopped oscillating, interrupts not listed in Table 11.3.3 cannot be used.

3: For each interrupt, refer to chapters “4. INTERRUPTS,” “5. KEY INPUT INTERRUPT FUNCTION,”

“6. TIMER A,” “7. TIMER B,” and “8. SERIAL I/O.”

11.3 Stop mode

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