전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

TMS320VC5421 데이터시트(PDF) 54 Page - Texas Instruments

부품명 TMS320VC5421
상세설명  DIGITAL SIGNAL PROCESSOR
PDF  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

TMS320VC5421 데이터시트(HTML) 54 Page - Texas Instruments

Back Button TMS320VC5421 Datasheet HTML 50Page - Texas Instruments TMS320VC5421 Datasheet HTML 51Page - Texas Instruments TMS320VC5421 Datasheet HTML 52Page - Texas Instruments TMS320VC5421 Datasheet HTML 53Page - Texas Instruments TMS320VC5421 Datasheet HTML 54Page - Texas Instruments TMS320VC5421 Datasheet HTML 55Page - Texas Instruments TMS320VC5421 Datasheet HTML 56Page - Texas Instruments TMS320VC5421 Datasheet HTML 57Page - Texas Instruments TMS320VC5421 Datasheet HTML 58Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 54 / 88 page
background image
TMS320VC5421
DIGITAL SIGNAL PROCESSOR
SPRS098 – DECEMBER 1999
54
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
multiply-by-N clock option (PLL Enabled)
The frequency of the reference clock provided at the CLKIN pin can be multiplied by a factor of N to generate
the internal machine cycle. The selection of the clock mode and the value of N is described in the
software-programmable phase-locked loop (PLL) section.
switching
characteristics
over
recommended
operating
conditions
[H
=
0.5tc(CO)]
(see Figure 23)
PARAMETER
’5421-200
UNIT
PARAMETER
MIN
TYP
MAX
UNIT
tc(CO)
Cycle time, CLKOUT
10
tc(CI)/N†
ns
td(CI-CO)
Delay time, CLKIN high/low to CLKOUT high/low
4
10
16
ns
tf(CO)
Fall time, CLKOUT
2
ns
tr(CO)
Rise time, CLKOUT
2
ns
tw(COL)
Pulse duration, CLKOUT low
H–2
H–1
H
ns
tw(COH)
Pulse duration, CLKOUT high
H–2
H–1
H
ns
tp
Transitory phase, PLL lock up time
30
ms
† N = Multiplication factor
timing requirements (see Figure 23)†
’5421-200
UNIT
MIN
MAX
UNIT
Integer PLL multiplier N (N = 1–15)
20‡
200
tc(CI)
Cycle time, CLKIN
PLL multiplier N = x.5
20‡
100
ns
tc(CI)
Cycle time, CLKIN
PLL multiplier N = x.25, x.75
20‡
50
ns
tf(CI)
Fall time, CLKIN
8
ns
tr(CI)
Rise time, CLKIN
8
ns
tw(CIL)
Pulse duration, CLKIN low
5
ns
tw(CIH) Pulse duration, CLKIN high
5
ns
† N = Multiplication factor
‡ The multiplication factor and minimum CLKIN cycle time should be chosen such that the resulting CLKOUT cycle time is within the specified range
(tc(CO))
tc(CO)
tc(CI)
tw(COH)
tf(CO)
tr(CO)
tf(CI)
CLKIN
CLKOUT
td(CI-CO)
tw(COL)
tr(CI)
tp
Unstable
tw(CIH)
tw(CIL)
Figure 23. External Multiply-by-One Clock Timing



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com