CDCE62002 datasheet(37/49 Pages) TI

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Lock Detect

PFD/

FromInputDivider

FromFeedbackDivider

ToLoopFilter

FromInputDivider

FromFeedbackDivider

Locked

Unlocked

FromInputDivider

FromFeedbackDivider

LockDetectWindow (Max)

LockDetectWindow Adjust

(a)

(b)

13 14

FromLockDetector

PLL_LOCK

1 = Locked

O = Unlocked

(c)

CDCE62002

www.ti.com.............................................................................................................................................................. SCAS882A – JUNE 2009 – REVISED JULY 2009

The CDCE62002 provides a lock detect indicator circuit that can be detected on an external Pin PLL_LOCK (Pin

32) and internally by reading PLLLOCKPIN bit (6) in Register 2.

Two signals whose phase difference is less than a prescribed amount are ‘locked’ otherwise they are ‘unlocked’.

The phase frequency detector / charge pump compares the clock provided by the input divider and the feedback

divider; using the input divider as the phase reference. The lock detect circuit implements a programmable lock

detect window. Table 20 shows an overview of how to configure the lock detect feature. The PLL_LOCK pin will

possibly jitter several times between lock and out of lock until the PLL achieves a stable lock. If desired, choosing

a wide loop bandwidth and a high number of successive clock cycles virtually eliminates this characteristic.

PLL_LOCK will return to out of lock, if just one cycle is outside the lock detect window or if a cycle slip occurs.

Figure 29. CDCE62002 Lock Detect

Table 20. CDCE62002 Lock Detect Control

LOCK DETECT

BIT NAME

→

LOCKW(1)

LOCKW(0)

WINDOW

→

0.13

0.14

2.1 ns

4.6 ns

7.2 ns

19.9 ns

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