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CDCE62002 데이터시트(PDF) 38 Page - Texas Instruments |
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CDCE62002 데이터시트(HTML) 38 Page - Texas Instruments |
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38 / 49 page ![]() Device Power Calculation and Thermal Management No Solder Mask Internal Power Plane Component Side Back Side Solder Mask Thermal Vias QFN-32 Thermal Slug (package bottom) Thermal Dissipation Pad (back side) Internal Ground Plane CDCE62002 Power Supply Bypassing – Recommended Layout Component & Back Side Component Side Only CDCE62002 SCAS882A – JUNE 2009 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com The CDCE62002 is a high performance device; therefore careful attention must be paid to device configuration and printed circuit board layout with respect to power consumption. Table 21 provides the power consumption for the individual blocks within the CDCE62002. To estimate total power consumption, calculate the sum of the products of the number of blocks used and the power dissipated of each corresponding block. Table 21. CDCE62002 Power Consumption INTERNAL BLOCK POWER DISSIPATED NUMBER OF BLOCKS (Power at 3.3V) PER BLOCK PER DEVICE Input Circuit 32 1 PLL and VCO Core 333 1 Output Divider 92 2 Output Buffer ( LVPECL) 150 2 Output Buffer (LVDS) 95 2 Output Buffer (LVCMOS) 62 4 This power estimate determines the degree of thermal management required for a specific design. Observing good thermal layout practices enables the thermal pad on the backside of the QFN-32 package to provide a good thermal path between the die contained within the package and the ambient air. This thermal pad also serves as the ground connection the device; therefore, a low inductance connection to the ground plane is essential. Figure 30. CDCE62002 Recommended PCB Layout Figure 31 shows a conceptual layout focusing on power supply bypass capacitor placement. If the capacitors are mounted on the back side, 0402 components can be employed; however, soldering to the Thermal Dissipation Pad can be difficult. If the capacitors are mounted on the component side, 0201 components must be used to facilitate signal routing. In either case, the connections between the capacitor and the power supply terminal on the device must be kept as short as possible. Figure 31. CDCE62002 Power Supply Bypassing 38 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): CDCE62002 |
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