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CDCE62002 데이터시트(PDF) 30 Page - Texas Instruments

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부품명 CDCE62002
상세설명  Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
PDF  49 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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CDCE62002 데이터시트(HTML) 30 Page - Texas Instruments

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Auxiliary Input Port
External Feedback Mode
FB
PFD/
CP
Feedback
Divider
Divby 1
Divby 1
REF_IN
CDCE62002
SCAS882A – JUNE 2009 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com
The auxiliary input on the CDCE62002 is designed to connect to an AT-Cut Crystal with a total load capacitance
of 8 pF to 18pF. One side of the crystal connects to Ground while the other side connects to the Auxiliary input of
the device. The circuit accepts crystals from 2 to 42 MHz.
Since the Auxiliary input operates between 0 and 2 Volts with a crystal, it can accept single-ended signals (e.g.,
LVCMOS). Electrically, it is equivalent to an LVCMOS input buffer with 8 pF of input capacitance.
Figure 24. CDCE62002 Auxiliary Input Port
The auxiliary input on the CDCE62002 is to serve as an external feedback port if Bit (10) in Register 0 is set to
“1” and input smart Mux setting is set to Reference input. In addition, The Reference Divider and the input divider
have to be set to divide by 1. This feature is implemented to allow direct access to the PFD of the PLL. The
delay from Reference input to PFD and from Auxiliary Reference to PFD is not matched. However, in close loop
system where the device output is fed to close the loop the delay difference between the Reference and External
feedback path will cancel out.
Figure 25. CDCE62002 in External Feedback Mode
30
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): CDCE62002



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