MAXQ3181-RAN+ datasheet(39/84 Pages) MAXIM

39 / 84 page

Low-Power, Active Energy, Polyphase AFE

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Interrupt Mask, Phase X = A/B/C (X.MASK) (A: 0x145, B: 0x231, C: 0x31D)

Energy Overflow Flags, Phase X = A/B/C (X.EOVER) (A: 0x146, B: 0x232, C: 0x31E)

These bits indicate that an overflow condition has occurred on an energy accumulator. An overflow condition is not

an error condition. Rather, it simply indicates that the value in the energy accumulator could be smaller than the pre-

vious reading due to the overflow in the counter. To obtain the actual energy usage since the previous reading,

0x100000000 must be added to the difference. These bits, once set, can be cleared only by the host.

Bit:

Name:

—

DIR_A

—

DCHAM

NOZXM

UVM

OVM

OCM

Reset:

BIT

NAME

FUNCTION

7, 5

—

Reserved.

DIR_A

Active Energy Direction Status

0 = positive

1 = negative

DCHAM

Real Energy Direction Change Mask. If set, a change in real power direction on phase X causes the

DCHA flag in the IRQ_FLAG register to be set.

NOZXM

No-Zero Crossing Mask. If set, a no-zero crossing on phase X causes the NOZX flag in the IRQ_FLAG

UVM

Undervoltage Mask. If set, an undervoltage condition on phase X causes the UV flag in the IRQ_FLAG

OVM

Overvoltage Mask. If set, an overvoltage condition on phase X causes the OV flag in the IRQ_FLAG

OCM

Overcurrent Mask. If set, an overcurrent condition on phase X causes the OC flag in the IRQ_FLAG

BIT

NAME

FUNCTION

7:5, 3:2

—

Reserved.

SOV

When set, indicates an overflow condition on the apparent energy accumulator.

ANOV

When set, indicates an overflow condition on the real negative energy accumulator.

APOV

When set, indicates an overflow condition on the real positive energy accumulator.

Bit:

Name:

—

SOV

—

ANOV

APOV

Reset:

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