DM9102DEP datasheet(56/70 Pages) DAVICOM

56 / 70 page

Final

Version: DM9102D-DS-F01

May 10, 2006

7.8 External MII Interface

DM9102D provides one external MII interface sharing with

all the pins with Boot ROM interface. This external MII

interface can be connected with external PHYceiver such as

Home Networking PHYceiver or other future technology

applications. This external MII interface can be set up by

hardware and software. The setup methods are listed as

below:

Test 1 (pin 37) Test 2 (pin 71)

Clkrun# (pin 36)

EECK (pin 79)

EEDO (pin 78)

Normal Operation

External MII mode

1/0

Note 1

Internal Test mode

Note 1: External MII mode

EEDO = 1(pulled high): only external PHY is selected.

EEDO= 0(floating) & MII_ Mode = 1: Select external PHY

EEDO = 0(float) & MII_ Mode = 0: Select internal PHY

Where MII_ Mode is the bit 18 of CR6

7.8.1 The Sharing Pin Table

(o): output, (i): input, (b): bi-direction

Normal Operation

External MII Interface

Boot ROM interface

External MII interface

TEST2=1

TEST2= 0

MD0/EEDI

MII_MDIO/EEDI(b)

MD1

MII_RXD2 (i)

MD2

MII_RXD1 (i)

MD3

MII_RXD0 (i)

MD4

MII_RXDV (i)

MD5

MII_RXER (i)

MD6

MII_CRS (i)

MD7

MII_RXCLK (i)

IDSEL2

MII_COL(i)

EEDO

MII_TXD0/EEDO(o)

EECK

MII_TXD1/EECK (o)

LED_MODE

MII_TXEN(o)

REQ2#

MII_TXCLK (i)

TRF_LED

MII_TXD2(o)

FDX_LED

MII_TXD3(o)

SPD100_LED

MII_MDC(o)

SPD10_LED

MII_RXD3(i)

DM9102DEP 데이터시트(PDF) 56 Page - Davicom Semiconductor, Inc.

DM9102DEP 데이터시트(HTML) 56 Page - Davicom Semiconductor, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

데이터시트 다운로드

링크 URL