| 전자부품 데이터시트 검색엔진 |
|
360J 데이터시트(PDF) 26 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
360J 데이터시트(HTML) 26 Page - Intel Corporation |
|
26 / 68 page ![]() Electrical Specifications 26 Datasheet NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. Crossing Voltage is defined as absolute voltage where rising edge of BCLK0 is equal to the falling edge of BCLK1. 3. Threshold Region is defined as a region entered about the crossing voltage in which the differential receiver switches. It includes input threshold hysteresis. 4. For Vin between 0 V and VIH. 5. Cpad includes die capacitance only. No package parasitics are included. 6. ΔV CROSS is defined as the total variation of all crossing voltages as defined in note 2. Figure 6. Deep Sleep VCC and ICC Loadline for Celeron M Processors: Standard Voltage and Ultra Low Voltage Table 8. FSB Differential BCLK Specifications Symbol Parameter Min Typ Max Unit Notes1 V IH Input High Voltage 0.660 0.710 0.850 V V IL Input Low Voltage 0 V V CROSS Crossing Voltage 0.250.350.55 V 2 ΔV CROSS Range of Crossing Points N/A N/A 0.140 V 6 V TH Threshold Region VCROSS - 0.100 VCROSS + 0.100 V 3 ILI Input Leakage Current ± 100 µA 4 Cpad Pad Capacitance 1.8 2.3 2.75 pF 5 I CC max V CC [V] Slope= -3.0 mV/A Vcc nom - 1.2% +/-1.5% from Nominal =VR Error 10mV= RIPPLE I CC [A] 0 Deep Sleep |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |