ADSP-BF504 datasheet(29/80 Pages) AD

29 / 80 page

Preliminary Technical Data

Rev. PrC

Page 29 of 80

January 2010

ADSP-BF504/F,ADSP-BF506F

Total Power Dissipation

Total power dissipation has two components:

1. Static, including leakage current

2. Dynamic, due to transistor switching characteristics

Many operating conditions can also affect power dissipation,

including temperature, voltage, operating frequency, and pro-

cessor activity. Processor — Electrical Characteristics on

Page 27 shows the current dissipation for internal circuitry

(VDDINT). IDDDEEPSLEEP specifies static power dissipation as a func-

tion of voltage (VDDINT) and temperature (see Table 18), and

IDDINT specifies the total power specification for the listed test

conditions, including the dynamic component as a function of

voltage (VDDINT) and frequency (Table 19).

There are two parts to the dynamic component. The first part is

due to transistor switching in the core clock (CCLK) domain.

This part is subject to an Activity Scaling Factor (ASF) which

represents application code running on the processor core and

L1 memories (Table 17).

The ASF is combined with the CCLK Frequency and VDDINT

dependent data in Table 19 to calculate this part. The second

part is due to transistor switching in the system clock (SCLK)

domain, which is included in the IDDINT specification equation.

Table 17. Activity Scaling Factors (ASF)1

1 See Estimating Power for ASDP-BF534/BF536/BF537 Blackfin Processors

(EE-297). The power vector information also applies to the ADSP-BF50x

processors.

IDDINT Power Vector

Activity Scaling Factor (ASF)

IDD-PEAK

TBD

IDD-HIGH

TBD

IDD-TYP

TBD

IDD-APP

TBD

IDD-NOP

TBD

IDD-IDLE

TBD

Table 18. Preliminary ADSP-BF50x Static Current — IDD-DEEPSLEEP (mA)

TJ (°C)

Voltage (VDDINT)

TBD V

–40

TBD

–20

TBD

100

TBD

105

TBD

1 Valid temperature and voltage ranges are model-specific. See Processor — Operating Conditions on Page 25.

Table 19. Preliminary ADSP-BF50x Dynamic Current in CCLK Domain (mA, with ASF = 1.0)1

fCCLK

(MHz)2

Voltage (VDDINT)

TBD V

400

TBD

300

TBD

200

TBD

100

TBD

1 The values are not guaranteed as standalone maximum specifications. They must be combined with static current per the equations of Processor — Electrical Characteristics

on Page 27.

2 Valid frequency and voltage ranges are model-specific. See Processor — Operating Conditions on Page 25.

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