Sensors

22

Freescale Semiconductor, Inc.

MMA685x

3.3.1

becomes open, the digital supply voltage will oscillate and cause either an undervoltage, or overvoltage failure within one internal

sample time. This failure will result in one of the following:

1. The DEVRES flag in the DEVSTAT register will be set. MMA685x will respond to SPI acceleration requests as

defined in Table 27.

2. MMA685x will be held in RESET and be non-responsive to SPI requests.

3.3.2

becomes open, the analog supply voltage will oscillate and cause either an undervoltage, or overvoltage failure within one internal

sample time. The DEVRES flag in the DEVSTAT register will be set. MMA685xMMA685x will respond to SPI acceleration re-

quests as defined in Table 27.

3.3.3

reset.

3.3.4

SPI Initiated Reset

In addition to voltage monitoring, a device reset can be initiated by a specific series of three write operations involving the

RES_1 and RES_0 bits in the DEVCTL register. Reference Section 3.1.5.1. for details regarding the SPI initiated reset.

3.4

Internal Oscillator

MMA685x includes a factory trimmed oscillator as specified in Section 2.6.

3.4.1

Oscillator Monitor

The COUNT register in the customer accessible array is a read-only register which provides the current value of a free-running

8-bit counter derived from the primary oscillator. A 10-bit pre-scaler divides the primary oscillator by 1024. Thus, the value in the

COUNT register increases by one count every 128

μs, and the register rolls over every 32.768 ms. The SPI master can periodi-

cally read the COUNT register, and verify the difference between subsequent register reads against the system time base.

1. The SPI access rates and deviations must be taken into account for this oscillator verification.