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MMA685X 데이터시트(PDF) 20 Page - Freescale Semiconductor, Inc |
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MMA685X 데이터시트(HTML) 20 Page - Freescale Semiconductor, Inc |
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20 / 52 page ![]() Sensors 20 Freescale Semiconductor, Inc. MMA685x 3.2 Customer Accessible Data Array CRC Verification 3.2.1 OTP Shadow Register Array CRC Verification The OTP shadow register array is verified for errors using a 3-bit CRC. The CRC verification uses a generator polynomial of g(x) = X 3+ X + 1, with a seed value = ‘111’. If a CRC error is detected in the OTP array, the IDE bit is set in the DEVSTAT register. 3.2.2 Writable Register CRC Verification The writable registers in the data array are verified for errors using a 3-bit CRC. The CRC verification is enabled only when the ENDINIT bit is set in the DEVCFG register. The CRC verification uses a generator polynomial of g(x) = X3 + X + 1, with a seed value = ‘111’. If a CRC error is detected in the writable register array, the IDE bit is set in the DEVSTAT register. |
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