CXD3003 datasheet(38/137 Pages) SONY

부품명	CXD3003

상세설명	CD Digital Signal Processor with Built-in Digital Servo and DAC

PDF	137 Pages

Scroll/Zoom	100%

제조업체	SONY [Sony Corporation]

홈페이지	http://www.sony.co.jp

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CXD3003R

Command bit

Processing

XVCO2 THRU = 0

XVCO2 THRU = 1

V16M output is connected internally to VCKI.

V16M output is not connected internally. Input the clock from VCKI.

Command bit

Processing

VCO2 CS = 0

VCO2 CS = 1

Low-speed wide-band PLL VCO2 is selected.

High-speed wide-band PLL VCO2 is selected.

∗ This command sets internal or external connection for the VCO2 used in CAV-W mode.

∗ The CXD3003R has two wide-band PLL VCO2, and this command selects one of these VCO1.

∗ Block diagram for VCO1 and VCO2 including VCOSEL1, VCOSEL2, KSL0 to 3, VCO1CS0, VCO1CS1 and

VCO2 CS.

∗ The CXD3003R has four multiplier PLL VCO1s, and this command selects one of these VCO1s.

Four VCOs are No.3, No.4, No.2 and No.1 in order of the maximum frequency.

Command bit

VCO1CS1

VCO1CS0

Processing

No.1 (Low-speed VCO for CXD3003)

No.2 (Middle-speed VCO for CXD3003)

No.3 (High-speed VCO for CXD3003)

No.4

Command

Data 4

MODE

specification

VCO1

CS1

VCO1

CS0

XVCO2

THRU

D11

D10

VCO2

CXD3003 데이터시트(PDF) 38 Page - Sony Corporation

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