CXD3003 datasheet(49/137 Pages) SONY

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CXD3003R

$DX commands

See "$CX commands".

Command bit

DCLV PWM MD = 1

DCLV PWM MD = 0

Digital CLV PWM mode specified. Both MDS and MDP are used.

CLV-W and CAV-W modes cannot be used.

Digital CLV PWM mode specified. Ternary MDP values are output.

CLV-W and CAV-W modes can be used.

Description

Command bit

TB = 0

TB = 1

TP = 0

TP = 1

Bottom hold at a cycle of RFCK/32 in CLVS and CLVH modes.

Bottom hold at a cycle of RFCK/16 in CLVS and CLVH modes.

Peak hold at a cycle of RFCK/4 in CLVS mode.

Peak hold at a cycle of RFCK/2 in CLVS mode.

Description

Command

Data 1

CLV CTRL

DCLV

PWM MD

Gain

CLVS

D23

D22

D21

D20

Command bit

FCSW

PCC1

PCC0

Processing

The VPCO1 signal is output and the VPCO2 pin is high impedance.

The VPCO1 and 2 pin outputs are high impedance.

The VPCO1 pin output is low and the VPCO2 pin is high impedance.

The VPCO1 pin output is high and the VPCO2 pin is high impedance.

The VPCO1 and 2 signals are output.

The VPCO1 and 2 pin outputs are high impedance.

The VPCO1 and 2 pin outputs are low.

The VPCO1 and 2 pin outputs are high.

• Processing for the $CX commands PCC1 and PCC2 and the $EX command FCSW is shown below.

CXD3003 데이터시트(PDF) 49 Page - Sony Corporation

CXD3003 데이터시트(HTML) 49 Page - Sony Corporation

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