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CXD3003 데이터시트(PDF) 48 Page - Sony Corporation

부품명 CXD3003
상세설명  CD Digital Signal Processor with Built-in Digital Servo and DAC
PDF  137 Pages
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제조업체  SONY [Sony Corporation]
홈페이지  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXD3003 데이터시트(HTML) 48 Page - Sony Corporation

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– 48 –
CXD3003R
Servo coefficient
setting
CLV CTRL ($DX)
Gain
MDP1
Gain
MDP0
Gain
MDS1
Gain
MDS0
Gain
CLVS
Gain
MDS1
0
0
0
0
1
1
Gain
MDS0
0
0
1
1
0
0
Gain
CLVS
0
1
0
1
0
1
GCLVS
–12dB
–6dB
–6dB
0dB
0dB
+6dB
Command
D23
Data 1
D22
D21
D20
Gain
DCLV0
Gain
DCLV1
PCC1 PCC0
D19
Data 2
Description
Valid only when DCLV = 1.
Valid when DCLV = 1 or 0.
D18
D17
D16
$CX commands
The spindle servo gain is externally set when DCLV = 1.
• CLVS mode gain setting: GCLVS
Note) When DCLV = 0, the CLVS gain is as follows.
When Gain CLVS = 0, GCLVS = –12dB.
When Gain CLVS = 1, GCLVS = 0dB.
Gain
MDP1
0
0
1
Gain
MDP0
0
1
0
GMDP
–6dB
0dB
+6dB
Gain
DCLV1
0
0
1
Gain
DCLV0
0
1
0
GDCLV
0dB
+6dB
+12dB
Gain
MDS1
0
0
1
Gain
MDS0
0
1
0
GMDS
–6dB
0dB
+6dB
• CLVP mode gain setting: GMDP: GMDS
• DCLV overall gain setting: GDCLV
Command bit
PCC1
PCC0
Processing
The VPCO1 and 2 signals are output.
The VPCO1 and 2 pin outputs are high impedance.
The VPCO1 and 2 pin outputs are low.
The VPCO1 and 2 pin outputs are high.
0
0
1
1
0
1
0
1
• This command controls the VPCO1 and VPCO2 pin signals.
Identical control can be performed for both VPCO1 and VPCO2 output with this setting. However, VPCO2 can
also be set to high impedance with the $E command FCSW separately from this setting.



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